1. Field of the Invention
This invention relates generally to communication systems and more particularly to high frequency XOR circuits used therein.
2. Description of Related Art
Communication systems are known to transport large amounts of data between a plurality of end user devices, which, for example, include telephones (i.e., land line and cellular), facsimile machines, computers, television sets, personal digital assistants, etc. As is known, such communication systems may be local area networks (LANs) and/or wide area networks (WANs) that are stand-alone communication systems or interconnected to other LANs and/or WANs as part of a public switched telephone network (PSTN), packet switched data network (PSDN), integrated service digital network (ISDN), or the Internet. As is further known, communication systems include a plurality of system equipment to facilitate the transporting of data. Such system equipment includes, but is not limited to, routers, switches, bridges, gateways, protocol converters, frame relays, and private branch exchanges.
The transportation of data within communication systems is governed by one or more standards that ensure the integrity of data conveyances and fairness of access for data conveyances. For example, there are a variety of Ethernet standards that govern serial transmissions within a communication system at data rates of 10 megabits-per-second, 100 megabits-per-second, 1 gigabit-per-second and beyond. Synchronous Optical NETwork (SONET), for example, currently provides for up to 10 gigabits-per-second. In accordance with such standards, many system components and end user devices of a communication system transport data via serial transmission paths. Internally, however, the system components and end user devices may process data in a parallel manner. As such, each system component and end user device must receive the serial data and convert the serial data into parallel data without loss of information. After processing the data, the parallel data must be converted back to serial data for transmission without loss of information.
Accurate recovery of information from high-speed serial transmissions typically requires transceiver components that operate at clock speeds equal to or higher than the received serial data rate. As the demand for data throughput increases, so do the demands on a high-speed serial transceiver. The increased throughput demands are pushing some current integrated circuit manufacturing processes to their operating limits. Integrated circuit processing limits (e.g., device parasitics, trace sizes, propagation delays, and device sizes) and integrated circuit (IC) fabrication limits (e.g., IC layout, frequency response of the packaging, and frequency response of bonding wires) limit the speed at which the high-speed serial transceiver may operate without loss of signal contents. Additionally, modern communication systems, including high data rate communication systems, typically include a plurality of circuit boards that communicate with each other by way of signal traces, bundled data lines, backplanes, etc.
At high data rates, the impedance due to series inductance and stray capacitance in the signal traces, backplanes and bonding wires increases. The increased impedance at high data rates causes circuit losses that reduce the magnitude and the high frequency content of the received data. At high data rates, the rise time of the data approaches the propagation time through the transport medium (backplanes, circuit traces, bonding wires, etc.) thus approaching a transmission line wherein the device parasitics are distributed across the transmission line. The distributed parasitics degrade the high frequency content of the high-speed data to the extent that the corners of an idealized square wave become significantly rounded.
Additionally, the distributed parasitics attenuate the high-speed data to the point where recovery of data and/or a clock introduces substantial errors thereby increasing inter-symbol interference and more generally, to result in the data being misread. Exclusive OR gates, among other circuit components, often produce an output signal from a logic circuit (such as a clock and data recovery circuit for high speed applications) that are required to propagate a distance sufficient yet the high frequency related circuit responses introduce high frequency errors as discussed above to result in erroneous readings of signal logic states. There is a need, therefore, for a method and an apparatus to increase the output signal magnitude at the high frequencies at a device level to compensate for the circuit losses. More specifically, this need is acute for XOR logic blocks in specified applications in order for XOR logic block output signals to be properly interpreted.